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DSP56857 Datasheet(PDF) 275 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 275 Page - Freescale Semiconductor, Inc |
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275 / 662 page ![]() Signal Descriptions Serial Peripheral Interface (SPI), Rev. 4 Freescale Semiconductor 11-5 11.4 Signal Descriptions 11.4.1 Master In/Slave Out (MISO) MISO is one of the two SPI module pins to transmit serial data. In full duplex operation, the MISO pin of the Master SPI module is connected to the MISO pin of the slave SPI module. The master SPI simultaneously receives data on its MISO pin and transmits data from its MOSI pin. Slave output data on the MISO pin is enabled only when the SPI is configured as a slave. The SPI is configured as a slave when the SPMSTR bit, illustrated in Table 11-4, is Logic 0 and its SS pin is at Logic 0. To support a multiple slave system, a Logic 1 on the SS pin puts the MISO pin in a high impedance state. 11.4.2 Master Out/Slave In (MOSI) MOSI is one of the two SPI module pins to transmit serial data. In full duplex operation, the MOSI pin of the Master SPI module is connected to the MOSI pin of the Slave SPI module. The Master SPI simultaneously transmits data from its MOSI pin and receives data on its MISO pin. 11.4.3 Serial Clock (SCLK) The serial clock synchronizes data transmission between master and slave devices. In a Master DSC, the SCLK pin is the clock output. In a slave DSC, the SCLK pin is the clock input. In full duplex operation, the master and slave exchange data in the same number of clock cycles as the number of bits of transmitted data. 11.4.4 Slave Select (SS) The SS pin has various functions depending on the current state of the SPI. For a SPI configured as a slave, the SS is used to select a slave. For CPHA = 0, the SS is used to define the start of a transmission. Since it is used to indicate the start of a transmission, the SS must be toggled high and low between each full length data transmitted for the CPHA = 0 format. However, it can remain low between transmissions for the CPHA = 1 format. Please refer to Figure 11-2. Figure 11-2. CPHA/SS Timing Data 1 Data 3 MISO/MOSI Data 2 Master SS Slave SS (CPHA = 0) Slave SS (CPHA = 1) |
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