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DSP56857 Datasheet(PDF) 529 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 529 Page - Freescale Semiconductor, Inc |
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529 / 662 page  Application: Date: Programmer: Sheet Appendix B - Programmer’s Sheets, Rev. 4 Freescale Semiconductor B-27 7 of 24 ITCN Interrupt Priority Register 4 (IPR4) Bits Name Description 15 - 14 SPI_RCV IPL SPI Receiver Full Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 13 -12 ESSI1_TLS IPL ESSI1 Transmit Last Slot Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 11 - 10 ESSI1_TD IPL ESSI1 Transmit Data Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 9 - 8 ESSI1_TDES IPL ESSI1Receive Data with Exception Status Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 Interrupt Priority Register 4 (IPR4) $1FFF20 + $4 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read SPI_RCV IPL ESSI1_TLS IPL ESSI1_TD IPL ESSI1_TD ES IPL ESSI1_RLS IPL ESSI1_RD IPL ESSI1_RD ES IPL ESSI0_TLS IPL Write Reset 00 00 00 00 00 00 00 00 denotes Reserved Bits See the following page for continuation of this register |
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