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AM5728 Datasheet(PDF) 175 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 175 Page - Texas Instruments |
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175 / 415 page  175 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Specifications Copyright © 2015–2019, Texas Instruments Incorporated Table 5-9. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name PRCM_MPU 32K_CLK Func 0.032 FUNC_32K_CLK SYS_CLK1/610 OSC1 SYS_CLK Func 38.4 WKUPAON_ICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE PRU-ICSS1 PRUSS1_IEP_CLK Func 200 ICSS_IEP_CLK ICSS_IEP_CLK DPLL_GMAC PRUSS1_GICLK Int 200 ICSS_CLK ICSS_CLK DPLL_GMAC PRUSS1_UART_G FCLK Func 192 PER_192M_GFCLK FUNC_192M_CLK DPLL_PER PRU-ICSS2 PRUSS2_IEP_CLK Func 200 ICSS_IEP_CLK ICSS_IEP_CLK DPLL_GMAC PRUSS2_GICLK Int 200 ICSS_CLK ICSS_CLK DPLL_GMAC PRUSS2_UART_G FCLK Func 192 PER_192M_GFCLK FUNC_192M_CLK DPLL_PER PWMSS1 PWMSS1_GICLK Int & Func 266 L4PER2_L3_GICLK CORE_X2_CLK DPLL_CORE PWMSS2 PWMSS2_GICLK Int & Func 266 L4PER2_L3_GICLK CORE_X2_CLK DPLL_CORE PWMSS3 PWMSS3_GICLK Int & Func 266 L4PER2_L3_GICLK CORE_X2_CLK DPLL_CORE QSPI QSPI_ICLK Int 266 L4PER2_L3_GICLK CORE_X2_CLK DPLL_CORE QSPI_FCLK Func 128 QSPI_GFCLK FUNC_256M_CLK DPLL_PER PER_QSPI_CLK DPLL_PER RNG RNG_ICLK Int 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE RTC_SS RTC_ICLK Int 133 RTC_L4_GICLK CORE_X2_CLK DPLL_CORE RTC_FCLK Func RTC_FCLK RTC_AUX_CLK FUNC_32K_CLK RTC Oscillator FUNC_32K_CLK SYS_CLK1/610 OSC1 SAR_ROM PRCM_ROM_CLO CK Int 266 L4CFG_L3_GICLK CORE_X2_CLK DPLL_CORE SATA SATA_FICLK Int 266 L3INIT_L3_GICLK CORE_X2_CLK DPLL_CORE SATA_PMALIVE_F CLK Func 48 L3INIT_48M_GFCLK FUNC_192M_CLK DPLL_PER REF_CLK Func 38 SATA_REF_GFCLK SYS_CLK1 OSC1 SDMA SDMA_FCLK Int & Func 266 DMA_L3_GICLK CORE_X2_CLK DPLL_CORE SHA2MD51 SHAM_1_CLK Int 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE SHA2MD52 SHAM_2_CLK Int 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE SL2 IVA_GCLK Int IVA_GCLK IVA_GCLK IVA_GFCLK DPLL_IVA SMARTREFLEX_C ORE MCLK Int 133 COREAON_L4_GICLK CORE_X2_CLK DPLL_CORE SYSCLK Func 38.4 WKUPAON_ICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE SMARTREFLEX_D SPEVE MCLK Int 133 COREAON_L4_GICLK CORE_X2_CLK DPLL_CORE SYSCLK Func 38.4 WKUPAON_ICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE SMARTREFLEX_G PU MCLK Int 133 COREAON_L4_GICLK CORE_X2_CLK DPLL_CORE SYSCLK Func 38.4 WKUPAON_ICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE SMARTREFLEX_IV AHD MCLK Int 133 COREAON_L4_GICLK CORE_X2_CLK DPLL_CORE SYSCLK Func 38.4 WKUPAON_ICLK SYS_CLK1 OSC1 DPLL_ABE_X2_CLK DPLL_ABE |
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