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AM5728 Datasheet(PDF) 220 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 220 Page - Texas Instruments

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AM5729, AM5728, AM5726
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM5729 AM5728 AM5726
Timing Requirements and Switching Characteristics
Copyright © 2015–2019, Texas Instruments Incorporated
Table 7-6. VIN4 IOSETs (continued)
Signals
IOSET1
IOSET2
IOSET3
BALL
MUX
BALL
MUX
BALL
MUX
vin4a_de0
H6/ P7
4 / 5
B10
3
C23
8
vin4a_fld0
P9/ J7
4 / 4
D11
3
F21
8
vin4a_clk0
P4
4
B11
3
B26
8
vin4b
vin4b_clk1
N9
6
V1
5
-
-
vin4b_de1
P9
6
V7
5
-
-
vin4b_fld1
P4
6
W2
5
-
-
vin4b_d0
R6
6
U4
5
-
-
vin4b_d1
T9
6
V2
5
-
-
vin4b_d2
T6
6
Y1
5
-
-
vin4b_d3
T7
6
W9
5
-
-
vin4b_d4
P6
6
V9
5
-
-
vin4b_d5
R9
6
U5
5
-
-
vin4b_d6
R5
6
V5
5
-
-
vin4b_d7
P5
6
V4
5
-
-
vin4b_hsync1
N7
6
U7
5
-
-
vin4b_vsync1
R4
6
V6
5
-
-
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section Manual IO Timing Modes of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information see the Control Module chapter in the Device TRM.
Manual IO Timings Modes must be used to ensure some IO timings for VIP1. See Table 7-2 Modes
Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-7 Manual
Functions Mapping for VIP1 for a definition of the Manual modes.
Table 7-7 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the
CFG_x registers.



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