XRT7250 datasheet(191/463 Pages) EXAR

191 / 463 page

XRT7250

DS3/E3 FRAMER IC

áç

REV. 1.1.1

172

By default, the Transmit DS3 Framer block will set the

three (3) FEBE bit-fields to [1, 1, 1] if all of the follow-

ing conditions are true.

• The Local Receive DS3 Framer block detects no P-

Bit Errors.

• The Local Receive DS3 Framer block detects no

CP-Bit Errors

Conversely, the Transmit DS3 Framer block will set

the three (3) FEBE bit-fields to a value other than [1,

1, 1] if any one of the following conditions are true.

• The Local Receive DS3 Framer block detects a P-

bit Error in the most recently received DS3 frame.

• The Local Receive DS3 Framer block detects a

“CP” bit Error in the most recently received DS3

frame.

4.2.4.2.2

Generating Errored DS3 Frames

The Transmit DS3 Framer block permits the user to

insert errors into the framing and error detection over-

head bits (e.g., the P, M and F-bits) of the outbound

DS3 data stream in order to support Far-End Equip-

ment testing. The user can exercise this option by

writing data to any of the numerous Transmit DS3

Mask Registers. These Mask Registers and their

comprising bit-fields are defined below.

The bit-fields of the Tx DS3 M-bit Mask Register, that

are relevant to error-insertion are shaded. The re-

maining bit-fields pertain to the FEBE bit-fields, and

are discussed in Section 4.2.4.2.1.9.

The Tx DS3 M-Bit Mask Register serves two purpos-

1. It allows the user to transmit his/her own value for

FEBE (3 bits) - please see Section 4.2.4.2.1.9.

2. It allows the user to transmit errored P-bits.

3. It allows the user to insert errors into the M-bit

(framing bits) in order to support equipment test-

ing.

Each of these bit-fields are discussed below.

Bit 3 - Tx Err (Transmit Errored) P-Bit

This bit-field allows the user to insert errors into the

P-bits, of each outbound DS3 Frame, for equipment

testing purposes. If this bit-field is 0, then the P-Bits

are transmitted as calculated from the payload of the

previous DS3 frames. However, if this bit-field is 1,

then the P-bits are inverted (from their calculated val-

ue) prior to transmission.

Bits 2 - 0: M-Bit Mask[2:0]

The Transmit DS3 Framer will automatically perform

an XOR operation with the M-bits (in the DS3 data-

stream) and the contents of the corresponding bit-

field, within this register. The results of this operation

will be written back into the M-bit positions within the

outbound DS3 Frames. Therefore, to insure that no

errors are inserted into the M-bits, make sure that the

contents of the M-Bit Mask[2:0] bit-fields are 0.

F-Bit Error Insertion

The remaining mask registers (Tx DS3 F-Bit Mask1

through Mask4 registers) contain bit-fields which cor-

respond to each of the 28 F-bits, within the DS3

frame. Prior to transmission, these bit-fields are auto-

matically XORed with the contents of the correspond-

ing bit fields within these Mask Registers. The result

of this XOR operation is written back into the corre-

sponding bit-field, within the outgoing DS3 frame, and

is transmitted on the line. Therefore, if none of the

bits are to be modified, then these registers must con-

tain all 0s (the default value).

TX DS3 M-BIT MASK REGISTER, ADDRESS = 0X35

BIT 7BIT 6BIT 5BIT 4

BIT 3

BIT2

BIT 1

BIT 0

TxFEBE

DAT[2]

TxFEBE

DAT[1]

TxFEBE

DAT[0]

FEBE Reg

Enable

TxErr PBit

MBit Mask(2) MBit Mask(1) MBit Mask(0)

R/W

TX DS3 F-BIT MASK1 REGISTER, ADDRESS = 0X36

BIT 7BIT 6BIT 5BIT 4BIT 3BIT2BIT 1BIT 0

Unused

FBit Mask(27) FBit Mask(26) FBit Mask(25) FBit Mask(24)

R/W

000

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