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XRT7250 Datasheet(PDF) 293 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 293 Page - Exar Corporation |
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293 / 463 page ![]() XRT7250 áç áç áç áç DS3/E3 FRAMER IC REV. 1.1.1 274 Setting this bit-field to “1” accomplishes the following. • It configures the Transmit E3 Framer block to com- pute the BIP-4 value of a given E3 frame, and insert in to the very last nibble, within the very next out- bound E3 frame. (Hence, bits 1533 through 1536, within each E3 frame, will function as the BIP-4 value) • It configures the Receive E3 Framer block to com- pute and verify the BIP-4 value of each incoming E3 frame. 5.2.4.2.3 Generating Errored E3 Frames The Transmit E3 Framer block permits the user to in- sert errors into the framing and error detection over- head bites (e.g., the FAS pattern, and the BIP-4 nib- ble) of the outbound E3 data stream in order to sup- port Remote Terminal Equipment testing. The user can exercise this option by writing data into any of the following registers. • TxE3 FAS Error Mask Register - 0 • TxE3 FAS Error Mask Register - 1 • TxE3 BIP-4 Error Mask Register Inserting Errors into the FAS pattern of the out- bound’ E3 frames. The user can insert errors into the FAS pattern bits, of each outbound E3 frame, by writing the appropriate data into either the TxE3 FAS Error Mask Register - 0 or TxE3 FAS Error Mask Register - 1. As the Transmit E3 Framer block formulates the out- bound E3 frames, the contents of the FAS pattern bits are automatically XORed with the contents of these two registers. The results of this XOR operation is written back into the corresponding bit-field within the outbound E3 frame, and is transmitted to the Remote Terminal Equipment. Therefore, if the user does not wish to modify any of these bits, then these registers must contain all “0’s” (the default value). Inserting Errors into the BIP-4 nibble, within each outbound E3 frame. The user can insert errors into the BIP-4 nibble, within each outbound E3 frame, by writing the appropriate data into the TxE3 BIP-4 Error Mask Register. TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Tx BIP-4 Enable TxASourceSel[1:0] TxNSourceSel[1:0] Tx AIS Enable Tx LOS Enable Tx FAS Source Select R/W R/W R/W R/W R/W R/W R/W R/W 1 X XXXX XX TXE3 FAS ERROR MASK REGISTER - 0 (ADDRESS = 0X48) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TxFAS_Error_Mask_Upper[4:0] RO RO RO R/W R/W R/W R/W R/W 0 0 0 XXX XX TXE3 FAS ERROR MASK REGISTER - 1 (ADDRESS = 0X49) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TxFAS_Error_Mask_Lower[4:0] RO RO RO R/W R/W R/W R/W R/W 0 0 0 XXX XX |
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