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XRT7250 Datasheet(PDF) 367 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 367 Page - Exar Corporation |
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367 / 463 page ![]() XRT7250 áç áç áç áç DS3/E3 FRAMER IC REV. 1.1.1 348 3. Interface the XRT7250, to the Terminal Equip- ment, as illustrated in Figure 163. 6.2.1.5 Mode 5 - The Nibble-Parallel/Local- Time/Frame-Slave Interface Mode Behavior of the XRT7250 If the XRT7250 has been configured to operate in this mode, then the XRT7250 will function as follows: A. Local Timing - Uses the TxInClk signal as the Timing Reference In this mode, the Transmit Section of the XRT7250 will use the TxInClk signal at its timing reference. Further, the chip will internally divide the TxInClk clock signal by a factor of 4 and will output this divid- ed clock signal via the TxNibClk output pin. The Transmit Terminal Equipment Input Interface block (within the XRT7250) will use the rising edge of the TxNibClk signal, to latch the data, residing on the Tx- Nib[3:0] into its circuitry. B. Nibble-Parallel Mode The XRT7250 will accept the DS3 payload data, from the Terminal Equipment, in a parallel manner, via the TxNib[3:0] input pins. The Transmit Terminal Equip- ment Input Interface will latch this data into its circuit- ry, on the rising edge of the TxNibClk output signal. C. Delineation of Outbound E3 Frames The Transmit Section will use the TxInClk input signal as its timing reference and will use the TxFrameRef input signal as its Framing Reference (e.g., the Trans- mit Section of the XRT7250 initiates frame generation upon the rising edge of the TxFrameRef signal). D. Sampling of payload data, from the Terminal Equipment In Mode 5, the XRT7250 will sample the data, at the TxNib[3:0] input pins, on the third rising edge of the TxInClk clock signal, following a pulse in the TxNibClk signal (see Figure 166). NOTE: The TxNibClk signal, from the XRT7250 operates nominally at 8.592 MHz (e.g., 34.368 MHz divided by 4). Interfacing the Transmit Payload Data Input Inter- face block of the XRT7250 to the Terminal Equip- ment for Mode 5 Operation Figure 165 presents an illustration of the Transmit Payload Data Input Interface block (within the XRT7250) being interfaced to the Terminal Equip- ment, for Mode 5 Operation. R/W R/W R/W R/W R/W R/W R/W R/W 00 10 1 0 0 0 FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) BIT 7BIT 6BIT 5BIT 4BIT 3BIT2 BIT 1 BIT 0 |
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