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XRT7250 Datasheet(PDF) 455 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 455 Page - Exar Corporation |
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455 / 463 page  XRT7250 áç áç áç áç DS3/E3 FRAMER IC REV. 1.1.1 436 Status), within the Rx E3 Interrupt Status Register - 2 to “1”, as indicated below Whenever the user’s system encounters the Change in Receive FERF Condition Interrupt, then it should do the following. 1. It should determine the current state of the FERF condition. Recall, that this interrupt can be gen- erated, whenever the XRT7250 Framer IC declares or clears the FERF defect. Hence, the user can determine the current state of the LOS defect by reading the state of Bit 0 (RxFERF) within the Rx E3 Configuration and Status Regis- ter - 2, as illustrated below. 6.3.6.2.8 The Detection of FEBE (Far-End- Block Error) Event Interrupt If the Detection of FEBE Event Interrupt is enabled, then the XRT7250 Framer IC will generate an inter- rupt, anytime the Receive E3 Framer block has re- ceived an E3 frame with the FEBE bit-field (within the MA byte) set to “1”. Enabling and Disabling the Detection of FEBE Event Interrupt The user can enable or disable the Detection of FEBE Event’ interrupt by writing the appropriate value into Bit 4 (FEBE Interrupt Enable) within the Rx E3 In- terrupt Enable Register - 2, as indicated below. Setting this bit-field to “1” enables this interrupt. Con- versely, setting this bit-field to “0” disables this inter- rupt. Servicing the Detection of the FEBE Event Inter- rupt Whenever the XRT7250 Framer IC detects this inter- rupt, it will do the following. • It will assert the Interrupt Request output pin (INT), by driving it “High”.It will set the Bit 4 (FEBE Inter- rupt Status), within the RxE3 Interrupt Status Reg- ister - 2 as indicated below. RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Status Not Used FEBE Interrupt Status FERF Interrupt Status BIP-8 Error Interrupt Status Framing Byte Error Interrupt Status RxPld Mis Interrupt Status RO RUR RO RUR RUR RUR RUR RUR 00 001 000 RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Rx LOF Algo RxLOF RxOOF RxLOS RxAIS RxPld Unstab Rx TMark RxFERF R/W RORO RO RORORORO XX XXXX XX RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Enable Not Used FEBE Interrupt Enable FERF Interrupt Enable BIP-8 Error Interrupt Enable Framing Byte Error Interrupt Enable RxPld Mis Interrupt Enable RO R/W RO R/W R/W R/W R/W R/W 00 0 X X 000 |
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