PIC16F913 datasheet(204/272 Pages) MICROCHIP

204 / 272 page

PIC16F917/916/914/913

DS41250E-page 202

Preliminary

Even if the flag bits were checked before executing a

SLEEP

instruction, it may be possible for flag bits to

become set before the SLEEP instruction completes. To

determine whether a SLEEP instruction executed, test

the PD bit. If the PD bit is set, the SLEEP instruction

was executed as a NOP.

To ensure that the WDT is cleared, a CLRWDT instruction

should be executed before a SLEEP instruction.

FIGURE 16-10:

WAKE-UP FROM SLEEP THROUGH INTERRUPT

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

OSC1(1)

CLKO(4)

INT pin

INTF flag

(INTCON<1>)

GIE bit

(INTCON<7>)

Instruction Flow

Instruction

Fetched

Instruction

Executed

PC + 1

PC + 2

Inst(PC) = Sleep

Inst(PC - 1)

Inst(PC + 1)

Sleep

Processor in

Sleep

Interrupt Latency(3)

Inst(PC + 2)

Inst(PC + 1)

Inst(0004h)

Inst(0005h)

Inst(0004h)

Dummy Cycle

PC + 2

0004h

0005h

Dummy Cycle

TOST(2)

PC + 2

Note

XT, HS or LP Oscillator mode assumed.

TOST = 1024 TOSC (drawing not to scale). This delay does not apply to EC and RC Oscillator modes.

GIE = 1 assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = 0, execution will continue in-line.

CLKO is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.

PIC16F913 Datasheet(PDF) 204 Page - Microchip Technology

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