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PIC16F913 Datasheet(PDF) 173 Page - Microchip Technology |
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PIC16F913 Datasheet(HTML) 173 Page - Microchip Technology |
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173 / 272 page ![]() © 2005 Microchip Technology Inc. Preliminary DS41250E-page 171 PIC16F917/916/914/913 14.12.2 RECEPTION When the R/W bit of the address byte is clear and an address match occurs, the R/W bit of the SSPSTAT register is cleared. The received address is loaded into the SSPBUF register. When the address byte overflow condition exists, then no Acknowledge (ACK) pulse is given. An overflow condition is defined as either bit BF (SSPSTAT<0>) is set, or bit SSPOV (SSPCON<6>) is set. This is an error condition due to the user’s firmware. An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF (PIR1<3>) must be cleared in software. The SSPSTAT register is used to determine the status of the byte. FIGURE 14-8: I2C™ WAVEFORMS FOR RECEPTION (7-BIT ADDRESS) P 9 8 7 6 5 D0 D1 D2 D3 D4 D5 D6 D7 S A7 A6 A5 A4 A3 A2 A1 SDA SCL 12 3 4 5 6 7 8 9 12 3 4 56 7 89 12 3 4 Bus Master terminates transfer Bit SSPOV is set because the SSPBUF register is still full. Cleared in software SSPBUF register is read ACK Receiving Data Receiving Data D0 D1 D2 D3 D4 D5 D6 D7 ACK R/W = 0 Receiving Address SSPIF (PIR1<3>) BF (SSPSTAT<0>) SSPOV (SSPCON<6>) ACK ACK is not sent. |
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