PIC16F15213 datasheet(128/439 Pages) MICROCHIP

128 / 439 page

16.4

TRISx - Direction Control

The TRISx register controls the PORTx pin output drivers, even when the pins are being used as analog inputs. The

user must ensure the bits in the TRISx register are set when using the pins as analog inputs. I/O pins configured as

analog inputs always read ‘0’.

Setting a TRISx bit (TRISx = 1) will make the corresponding PORTx pin an input (i.e., disable the output driver).

Clearing a TRISx bit (TRISx = 0) will make the corresponding PORTx pin an output (i.e., it enables output driver and

puts the contents of the output latch on the selected pin).

16.5

ANSELx - Analog Control

Ports that support analog inputs have an associated ANSELx register. The ANSELx register is used to configure the

Input mode of an I/O pin to analog. Setting an ANSELx bit high will disable the digital input buffer associated with

that bit and cause the corresponding input value to always read ‘0’, whether the value is read in PORTx register or

selected by PPS as a peripheral input.

Disabling the input buffer prevents analog signal levels on the pin between a logic high and low from causing

excessive current in the logic input circuitry.

The state of the ANSELx bits has no effect on digital or analog output functions. A pin with TRIS clear and ANSEL

set will still operate as a digital output, but the Input mode will be analog. This can cause unexpected behavior when

executing Read-Modify-Write instructions on the PORTx register.

Important: The ANSELx bits default to the Analog mode after Reset. To use any pins as digital general

purpose or peripheral inputs, the corresponding ANSEL bits must be changed to ‘0’ by the user.

16.6

WPUx - Weak Pull-Up Control

The WPUx register controls the individual weak pull-ups for each PORT pin. When a WPUx bit is set (WPUx = 1), the

weak pull-up will be enabled for the corresponding pin. When a WPUx bit is cleared (WPUx = 0), the weak pull-up will

be disabled for the corresponding pin.

16.7

INLVLx - Input Threshold Control

The INLVLx register controls the input voltage threshold for each of the available PORTx input pins. A selection

between the Schmitt Trigger CMOS or the TTL compatible thresholds is available. If that feature is enabled, the input

threshold is important in determining the value of a read of the PORTx register and also all other peripherals which

are connected to the input. Refer to the I/O Ports table in the “Electrical Specifications” chapter for more details on

threshold levels.

Important: Changing the input threshold selection must be performed while all peripheral modules are

disabled. Changing the threshold level during the time a module is active may inadvertently generate a

transition associated with an input pin, regardless of the actual voltage level on that pin.

16.8

SLRCONx - Slew Rate Control

The SLRCONx register controls the slew rate option for each PORT pin. Slew rate for each PORT pin can be

controlled independently. When a SLRCONx bit is set (SLRCONx = 1), the corresponding PORT pin drive is slew

PIC16F15213/14/23/24/43/44

I/O Ports

and its subsidiaries

Data Sheet

DS40002195E-page 128

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