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CS5320 Datasheet(PDF) 106 Page - Applied Micro Circuits Corporation |
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CS5320 Datasheet(HTML) 106 Page - Applied Micro Circuits Corporation |
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106 / 160 page ![]() S5320 – PCI Match Maker: Mailbox Overview 106 DS1656 AMCC Confidential and Proprietary Revision 5.03 – June 14, 2006 Data Sheet Servicing a PCI Mailbox Interrupt (INTA# Asserted): 1. Identify the interrupt source(s). Multiple interrupt sources are available on the S5320. The interrupt service routine must verify that a mailbox generated the interrupt (and not some other interrupt source). 2. Check mailbox status. The mailbox status bits indicate which mailbox bytes must be read or written. 3. Access the mailbox. Based on the contents of MBEF, mailboxes are read or written. Reading an incoming mailbox byte clears the corresponding status bit in MBEF. 4. Clear the interrupt source. The PCI INTA# signal is deasserted by clearing the interrupt request. The request is cleared by writing a 1 to the appropriate bit. Servicing the Add-On mailbox interrupt (IRQ# Asserted): 1. Identify the interrupt source(s). Multiple interrupt sources are available on the S5320. The interrupt service routine must verify that a mailbox generated the interrupt (and not some other interrupt source). 2. Check mailbox status. The mailbox status bits indicate which mailbox bytes must be read or written. 3. Access the mailbox. Based on the contents of AMBEF, mailboxes are read or written. Reading the incoming mailbox byte clears the corresponding status bit in AMBEF. INTCSR Bit 23 PCI interrupt asserted INTCSR Bit 17 PCI incoming mailbox interrupt indicator INTCSR Bit 16 PCI outgoing mailbox interrupt indicator MBEF Bits 31:28 Full PCI incoming mailbox bytes MBEF Bits 15:12 Empty PCI outgoing mailbox bytes OMB Bits 31:0 PCI outgoing mailboxes IMB Bits 31:0 PCI incoming mailboxes INTCSR Bit 17 Clear PCI incoming mailbox interrupt INTCSR Bit 16 Clear PCI outgoing mailbox interrupt AINT Bit 23 Add-On interrupt asserted AINT Bit 17 Add-On outgoing mailbox interrupt indicator AINT Bit 16 Add-On incoming mailbox interrupt indicator AMBEF Bits 31:28 Empty Add-On outgoing mailbox bytes AMBEF Bits 15:12 Full Add-On incoming mailbox bytes AIMB Bits 31:0 Add-On incoming mailbox AOMB Bits 31:0 Add-On outgoing mailbox |
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