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ICS1893AF Datasheet(PDF) 133 Page - Renesas Technology Corp

Part # ICS1893AF
Description  3.3-V 10Base-T/100Base-TX Integrated PHYceiver
PDF  137 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS1893AF Datasheet(HTML) 133 Page - Renesas Technology Corp

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Chapter 10
DC and AC Operating Conditions
ICS1893AF, Rev. D 10/26/04
October, 2004
133
ICS1893AF Data Sheet - Release
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.20
Auto-Negotiation Fast Link Pulse Timing
Table 10-27 lists the significant time periods for the ICS1893AF Auto-Negotiation Fast Link Pulse. The time
periods consist of timings of signals on the following pins:
• TP_TXP
• TP_TXN
Figure 10-21 shows the timing diagram for one pair of these differential signals, for example TP_TXP minus
TP_TXN.
Figure 10-21.
Auto-Negotiation Fast Link Pulse Timing Diagram
Table 10-27.
Auto-Negotiation Fast Link Pulse Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
Clock/Data Pulse Width
–
–
90
–
ns
t2
Clock Pulse-to-Data Pulse Timing
–
55
60
70
µs
t3
Clock Pulse-to-Clock Pulse Timing
–
110
125
140
µs
t4
Fast Link Pulse Burst Width
–
–
5
–
ms
t5
Fast Link Pulse Burst to Fast Link Pulse Burst
–
10
15
25
ms
t6
Number of Clock/Data Pulses in a Burst
–
15
20
30
pulses
Clock
Pulse
Clock
Pulse
Data
Pulse
t1
t3
t2
t4
t5
t1
FLP Burst
FLP Burst
Differential
Twisted Pair
Transmit Signal
Differential
Twisted Pair
Transmit Signal



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