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MC68340 Datasheet(PDF) 163 Page - Freescale Semiconductor, Inc

Part # MC68340
Description  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 Datasheet(HTML) 163 Page - Freescale Semiconductor, Inc

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MC68340 USER’S MANUAL
MOTOROLA
5.3.3.7 BINARY-CODED DECIMAL (BCD) INSTRUCTIONS. Five instructions support
operations on BCD numbers. The arithmetic operations on packed BCD numbers are add
decimal with extend (ABCD), subtract decimal with extend (SBCD), and negate decimal
with extend (NBCD). Table 5-9 is a summary of the BCD operations.
Table 5-9. Binary-Coded Decimal Operations
Instruction
Operand
Syntax
Operand Size
Operation
ABCD
Dn, Dn
– (An), – (An)
8
8
Source 10 + Destination10 + X ⇒ Destination
NBCD
〈ea〉
8
8
0 – Destination10 – X ⇒ Destination
SBCD
Dn, Dn
– (An), – (An)
8
8
Destination10 – Source10 – X ⇒ Destination
5.3.3.8 PROGRAM CONTROL INSTRUCTIONS. A set of subroutine call and return
instructions and conditional and unconditional branch instructions perform program control
operations. Table 5-10 summarizes these instructions.
Table 5-10. Program Control Operations
Instruction
Operand
Syntax
Operand Size
Operation
Conditional
Bcc
〈label〉
8, 16, 32
If condition true, then PC + d
⇒ PC
DBcc
Dn
, 〈label〉
16
If condition false, then Dn – 1
⇒ PC;
if Dn
≠ (– 1), then PC + d ⇒ PC
Scc
〈ea〉
8
If condition true, then destination bits are set to 1;
else destination bits are cleared to 0
Unconditional
BRA
〈label〉
8, 16, 32
PC + d
⇒ PC
BSR
〈label〉
8, 16, 32
SP – 4
⇒ SP; PC ⇒ (SP); PC + d ⇒ PC
JMP
〈ea〉
none
Destination
⇒ PC
JSR
〈ea〉
none
SP – 4
⇒ SP; PC ⇒ (SP); destination ⇒ PC
NOP
none
none
PC + 2
⇒ PC
Returns
RTD
#
〈d〉
16
(SP)
⇒ PC; SP + 4 + d ⇒ SP
RTR
none
none
(SP)
⇒ CCR; SP + 2 ⇒ SP; (SP) ⇒ PC; SP + 4 ⇒
SP
RTS
none
none
(SP)
⇒ PC; SP + 4 ⇒ SP
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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