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SC101161DT Datasheet(PDF) 129 Page - Freescale Semiconductor, Inc

Part # SC101161DT
Description  Device User Guide
PDF  142 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

SC101161DT Datasheet(HTML) 129 Page - Freescale Semiconductor, Inc

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Device User Guide — 9S12DT128DGV2/D V02.15
129
Freescale Semiconductor
A.7 SPI
A.7.1 Master Mode
Figure A-6 and Figure A-7 illustrate the master mode timing. Timing values are shown in (Table
A-18).
Figure A-6 SPI Master Timing (CPHA = 0)
SCK
(OUTPUT)
SCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
SS1
(OUTPUT)
1
9
5
6
MSB IN2
BIT 6 . . . 1
LSB IN
MSB OUT2
LSB OUT
BIT 6 . . . 1
10
4
4
2
9
(CPOL
= 0)
(CPOL
= 1)
3
11
12
1.if configured as an output.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.



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