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PM5352 Datasheet(PDF) 8 Page - PMC-Sierra, Inc

Part # PM5352
Description  155 Mbit/s ATM and Packet-Over-SONET/SDH Physical Layer Device
PDF  2 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5352 Datasheet(HTML) 8 Page - PMC-Sierra, Inc

  PM5352 Datasheet HTML 1Page - PMC-Sierra, Inc PM5352 Datasheet HTML 2Page - PMC-Sierra, Inc  
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PM5352 S/UNI STAR
DATA SHEET
PMC-1990421
ISSUE 2
SATURN USER NETWORK INTERFACE 155 (STAR)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
4
1.5
The SONET Transmitter
• Synthesizes the 155.52 MHz transmit clock from a 19.44 MHz
reference.
• Provides a differential TTL serial interface (can be adapted to PECL
levels) at 155.52 Mbit/s with both line rate data (TXD+/-) and clock
(TXC+/-).
• Provides a transmit frame pulse input to align the transport frames to a
system reference.
• Provides a transmit byte clock (divide by eight of the synthesized line
rate clock) to provide a timing reference for the transmit outputs.
• Optionally inserts register programmable APS (K1, K2) and
synchronization status (S1) bytes.
• Optionally inserts path alarm indication signal (PAIS), path remote
defect indication (PRDI), line alarm indication signal (LAIS) and line
remote defect indication (LRDI).
• Inserts path BIP-8 codes (B3), path far end block error (G1)
indications, line BIP-24 codes (B2), line far end block error (M1)
indications, and section BIP-8 codes (B1) to allow performance
monitoring at the far end.
• Optionally inserts the section and line data communication channels
(D1-D3 or D4-12) via a 192 kbit/s (D1-D3) and 576 kbit/s (D4-D12)
serial stream.
• Optionally inserts the 16 or 64 byte section trace (J0) sequence and
the 16 or 64 byte path trace (J1) sequence from internal register
banks.
• Scrambles the transmitted STS-3c (STM-1) stream and inserts the
framing bytes (A1,A2).
• Inserts ATM cells or POS frames into the transmitted STS-3c (STM-1)
synchronous payload envelope.
1.6
The Transmit ATM Processor
• Provides idle/unassigned cell insertion.



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