PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

v

PM9311/2/3/5 ETT1™ CHIP SET

PMC-2000164

ISSUE 3

ENHANCED TT1™ SWITCH FABRIC

Released

Data Sheet

PMC-Sierra, Inc.

A.1 Frame Formats - Dataslice To and From Enhanced Port Processor........ 317

A.2 Frame Formats -DatasliceToand From Crossbar.... .......... ........ 318

A.3 Frame Formats - Enhanced Port Processor To and From Scheduler ....... 319

Appendix B

Common Pinout Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 323

B.1 JTAG Interface . .......... ........... ........... .......... ........ 323

B.2 Reserved Manufacturing Test Pins ..... ........... .......... ........ 323

B.3 Power Supply Connections. ........... ........... .......... ........ 324

B.4 Example Power Up Sequence .......... ........... .......... ........ 325

Appendix C

InterfacingDetails forETT1 .. .. ... .. .. ... .. .. ... .. .. ... .. 327

C.1 Compensating for Round Trip Delay Between Linecard and ETT1(LCS) .... 327

C.1.1

PreventingUnderflow of theVOQ ... ... ... .. ... ... ... ... .. ... ... ... ... .. ... ... 327

C.2 The 8b/10b Interface to theDataslice .... ........... .......... ........ 328

C.2.1

Link . . . . ... ... ... ... .. ... ... ... ... ... .. ... ... ... ... .. ... ... ... ... .. ... ... 329

C.2.2

Channel ... ... ... ... .. ... ... ... ... ... .. ... ... ... ... .. ... ... ... ... .. ... ... 333

C.3 Managing Cell Rates (Setting the Idle Count Register) .......... ........ 335

C.4 Avoiding Delays Dueto IdleCells ...... ........... .......... ........ 336