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ST72321 Datasheet(PDF) 7 Page - STMicroelectronics |
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ST72321 Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 189 page ![]() ST72321 7/189 1 INTRODUCTION The ST72F321 and ST72321 devices are mem- bers of the ST7 microcontroller family designed for mid-range applications All devices are based on a common industry- standard 8-bit core, featuring an enhanced instruc- tion set and are available with FLASH or ROM pro- gram memory. Under software control, all devices can be placed in WAIT, SLOW, ACTIVE-HALT or HALT mode, reducing power consumption when the application is in idle or stand-by state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. Related Documentation AN1131: Migrating applications from ST72511/ 311/314 to ST72521/321/324 Figure 1. Device Block Diagram 8-BIT CORE ALU OSC1 VPP CONTROL PROGRAM (16K - 60K Bytes) VDD RESET PORT F PF7:0 (8-bits) TIMER A BEEP PORT A RAM (512 - 2048 Bytes) PORT C 10-BIT ADC VAREF VSSA PORT B PB7:0 (8-bits) PWM ART PORT E PE7:0 (8-bits) SCI TIMER B PA7:0 (8-bits) PORT D PD7:0 (8-bits) SPI PC7:0 (8-bits) VSS WATCHDOG TLI OSC LVD OSC2 MEMORY MCC/RTC/BEEP EVD AVD I2C |
Similar Part No. - ST72321_04 |
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