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MPC8280 Datasheet(PDF) 386 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 386 Page - Freescale Semiconductor, Inc |
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386 / 1386 page ![]() PCI Bridge MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 9-78 Freescale Semiconductor Figure 9-72. Outbound Post_FIFO Tail Pointer Register (OPTPR) 9.12.3.4 I2O Registers The following sections discuss I2O registers. 9.12.3.4.1 Inbound FIFO Queue Port Register (IFQPR) IFQPR is used by PCI masters to access inbound messages in local memory. Local processor does not have access to this port. IFQPR should be accessed only from the PCI bus. IFQPR is described in Figure 9-73 and Table 9-58. 31 20 19 16 Field QBA OPTP Reset 0000_0000_0000_0000 R/W R R/W Addr 0x104DA 15 21 0 Field OPTP — Reset 0000_0000_0000_0000 R/W R/W R Addr 0x104D8 Table 9-57. OPTPR Field Descriptions Bits Name Description 31–20 QBA Queue base address. When read returns the contents of QBAR bits 31-20. 19–2 OPTP Outbound post_FIFO tail pointer. Local memory offset of the tail pointer of the outbound post list FIFO. 1–0 — Reserved, should be cleared. |
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