UPSD3422 datasheet(181/293 Pages) STMICROELECTRONICS

181 / 293 page

uPSD34xx

Programmable counter array (PCA) with PWM

181/293

27.10

PWM mode - fixed frequency, 10-bit

The 10-bit PWM logic requires that all 3 TCMs in PCA0 or PCA1 operate in the same 10-bit

PWM mode. The 10-bit PWM operates in a similar manner as the 16-bit PWM, except the

PCACHm and PCACLm counters are reconfigured as 10-bit counters. The CAPCOMHn and

CAPCOMLn Registers become 10-bit registers.

PWM duty cycle of each TCM module can be specified in the 10-bit CAPCOMHn and

CAPCOMLn Registers. When the 10-bit PCA counter is equal or greater than the values in

the 10-bit registers CAPCOMHn and CAPCOMLn, the PWM output switches to a high state.

When the 10-bit PCA counter overflows, the PWM pin is switched to a logic low and starts

the next PWM pulse.

The most-significant 6 bits in the PCACHm counter and CAPCOMH Register are “Don’t

cares” and have no effect on the PWM generation.

27.11

Writing to capture/compare registers

When writing a 16-bit value to the PCA Capture/Compare registers, the low byte should

always be written first. Writing to CAPCOMLn clears the E_COMP Bit to '0'; writing to

CAPCOMHn sets E_COMP to '1' the largest duty cycle is 100% (CAPCOMHn CAPCOMLn

= 0x0000), and the smallest duty cycle is 0.0015% (CAPCOMHn CAPCOMLn = 0xFFFF). A

0% duty cycle may be generated by clearing the E_COMP Bit to ‘0’.

27.12

Control register bit definition

Each PCA has its own PCA_CONFIGn, and each module within the PCA block has its own

TCM_Mode Register which defines the operation of that module (see Table 96 on page 182

through Table 97 on page 182). There is one PCA_STATUS Register that covers both PCA0

and PCA1 (see Table 98 on page 183).

UPSD3422 Datasheet(PDF) 181 Page - STMicroelectronics