L9945 datasheet(109/144 Pages) STMICROELECTRONICS

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Safety & diagnostics

This chapter contains all the information regarding safety and diagnostic features. All the external and internal

disable sources are described. The Built-In Self-Test (BIST), HardWare Self-Check (HWSC) and the

Communication Check (CC) watchdog are also explained. The diagnostics implemented for monitoring the output

status and protecting the external FETs are described.

All the information regarding the effects of disable sources and diagnostics on the output pre-drivers is

summarized in Section 6.6.

6.1

Disable sources

There are several disable sources implemented in order to guarantee safety and correct functionality of the output

pre-drivers.

6.1.1

DIS & NDIS pins

For safety purposes, the device features two disable pins that can be driven by an external microcontroller:

•

DIS: is a positive asserted disable input with internal pull up. When DIS is asserted, all channels except 7

and 8 are actively turned off. DIS status can be monitored reading DIS_STATE bit via SPI. If DIS has been

asserted, the event is latched in the DIS_LATCH, cleared on SPI readout. Outputs are automatically re-

engaged when DIS is released.

•

NDIS: is a negative asserted disable input/output with internal pull down. Refer to Figure 24.

–

When used as input, a negative assertion implies an active shut off of all the outputs except

channels 7 and 8. NDIS status can be monitored reading NDIS_STATE bit via SPI. If NDIS has been

asserted, the event is latched in the NDIS_LATCH, cleared on SPI readout. Outputs are

automatically re-engaged when NDIS is released.

–

This device uses this pin as output every time an over/under voltage is detected on VDD5 supply.

The purpose is to provide a feedback on the VDD5 status to the external microcontroller. This

functionality is enabled only if NRES is set high. If NDIS is internally pulled down, the event is latched

in NDIS_out_LATCH, cleared on SPI readout.

In case of overvoltage (VDD5 > VVDD5_OV for t > tVDD5_OV) NDIS is pulled-down immediately.

In case of undervoltage (VDD5 < VVDD5_UV for t > tVDD5_UV1) NDIS is pulled-down after tVDD5_UV2.

Note:

For timings and electrical characteristics related to VDD5 refer to Table 8.

When configured as H-Bridge, channels 7 and 8 are handled like other channels and are disabled in case of

DIS/NDIS assetion.

When used as output, NDIS is protected against overvoltage. In case NDIS is internally activated low and the

voltage at NDIS pin exceeds VNDIS_OV, for a time longer than tNDIS_OV + tNDIS_OV_react, the protection is

activated by switching OFF the pull down structure on NDIS pin. Once the protection is activated it will stay active

until the next NDIS internal activation event. NDIS overvoltage event is latched into NDIS_PROT_LATCH, cleared

via SPI readout.

L9945

Safety & diagnostics

DS12275 - Rev 10

page 109/144

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