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ST92163 - USB PERIPHERAL (USB)

8.3 USB PERIPHERAL (USB)

8.3.1 Introduction

The USB Peripheral provides a full-speed function

interface between the USB bus and the ST9 mi-

crocontroller.

8.3.2 Main Features

USB Specification Version 1.1 Compliant

Supports 8 device addresses

16 software configurable endpoints supporting:

• All USB transfer types (control, interrupt, bulk , and

isochronous)

• Burst-DMA transfers to up to 1K bytes RAM buffers

USB Suspend/Resume operations

On-Chip 3.3V Regulator

On-Chip USB Transceiver

Special functions on alternate output pins:

• USB upstream port Output Enable signal (USBOE)

• Start-Of-Frame pulse (SOFP)

Two bit-mirror registers

8.3.3 Functional Description

The USB interface is composed of the following

blocks (see Figure 69)

SIE (Serial Interface Engine): implementing

USB protocol layer (for a detailed description of

USB protocol refer to chapter 7, 8 of the

“Universal

Serial

Bus

Specification”).

The

functions of this block include: synchronisation

pattern recognition, bit-stuffing, CRC generation

and checking, PID verification/generation and

handshake evaluation. It must interface with

USB bus on one side and with the ST9 core on

the other side.

ST9 interface: this block is connected between

the SIE and the ST9 microcontroller. Its purpose

is to handle specific endpoint registers and

provide interrupt and DMA servicing to the SIE.

The unit transfers data from or to the memory,

and uses the Register File to save/load pointer

and counter values without CPU intervention,

taking control of the ST9 buses (Burst-DMA

interface).

The

ST9

Interface

unit

uses

interrupts

require

attention

from

the

microcontroller at the end of data transmission/

reception, and to flag error conditions.

Port Interface: this block contains the logic

related to the USB physical port. The port

interface also handles the resume detection.

Frame Timer: its function is to monitor the Start-

of-Frame (SOF) timing points. It detects a global

suspend (from the host) when no USB traffic

has been seen for 3 ms. It also generates the

SOFP output for any external device requiring

Start-of-Frame synchronization.

Port transceiver: containing differential and

single-ended receivers and slew rate controlled

output buffers.

Figure 69. Block Diagram

Full-Speed

DP0

DM0

SOF Timer

SIE

Endpoint

Logic and

DMA

Controller

Registers

Burst

USBOE

SOFP

3.3 V

Transceiver

regulator

Interface

Port

Interrupt

Controller

WUIMU

LP_SUSP

WKUP15

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