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ST72321BXXX-AUTO Datasheet(PDF) 24 Page - STMicroelectronics |
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ST72321BXXX-AUTO Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 247 page  Introduction ST72321Bxxx-Auto 24/247 15. Table 27: I/O output mode selection on page 76: Added title 16. Table 31: Effect of low power modes on I/O ports on page 80: Added title 17. Table 32: I/O port interrupt control/wake-up capability on page 80: Added title 18. Table 34: Effect of low power modes on WDG on page 85: Added title 19. Table 37: Effect of low power modes on MCC/RTC on page 88: Added title 20. Table 38: MCC/RTC interrupt control/wake-up capability on page 88: Added title 21. Table 40: Time base selection on page 90: Added title 22. Table 42: Beep frequency selection on page 90: Added title 23. Table 45: Prescaler selection for ART on page 98: Added title 24. Table 50: PWM output signal polarity selection on page 100: Added title 25. 16-bit read sequence on page 106: Minor text editing changes 26. Section 13.3.6: One Pulse mode on page 113: Edited step 1 of procedure 27. Section 13.3.7: Pulse width modulation mode on page 115: Edited steps 1 and 2 of procedure 28. Table 55: Effect of low power modes on 16-bit timer on page 117: Added title 29. Table 56: 16-bit timer interrupt control/wake-up capability on page 117: Added title 30. Table 63: Effect of low power modes on SPI on page 135: Added title 31. Table 64: SPI interrupt control/wake-up capability on page 135: Added title 32. Table 70: Effect of low power modes on SCI on page 151: Added title 33. Table 71: SCI interrupt control/wake-up capability on page 151: Added title 34. Table 80: Effect of low power modes on I2C on page 168: Added title 35. Figure 69: Interrupt control logic diagram on page 168: Changed title 36. Table 81: I2C interrupt control/wake-up capability on page 168: Added title 37. Table 90: Effect of low power modes on ADC on page 179: Changed title 38. Table 103: Voltage characteristics on page 191: Removed note 2 39. Removed note below Figure 73: fCPU max versus VDD on page 193 40. Table 111: Oscillators, PLL and LVD current consumption on page 197: Added title 41. Table 114: External clock source on page 199: Replaced symbol for input leakage current IL with Ilkg 42. Figure 74: Typical application with an external clock source on page 199: Replaced symbol IL with Ilkg 43. Section 19.7: EMC (electromagnetic compatibility) characteristics on page 204: Modified title 44. Table 128: ICCSEL/VPP pin characteristics on page 213: Replaced symbol for input leakage current IL with Ilkg 45. Table 131: SPI characteristics on page 215: Added Note 1 46. Figure 90: SPI slave timing diagram with CPHA = 0(1) on page 216: Reorganized footnotes 47. Figure 91: SPI slave timing diagram with CPHA = 1(1) on page 216: Reorganized footnotes 48. Figure 92: SPI master timing diagram(1) on page 217: Reorganized footnotes 49. Table 132: I2C control interface characteristics on page 218: Reorganized footnotes |
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