M32C83T datasheet(169/527 Pages) RENESAS

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Page 146

14. Timer (Timer A)

)

(

Pulse width of one count source cycle

or more is required

NOTES:

1. When the rising edge of INT2 is selected.

TA3OUT

(A-phase)

Count source

TA3IN

(B-phase)

INT2 (1)

(Z-phase)

TA3OUT

(A-phase)

Count source

TA3IN

(B-phase)

Timer counter is reset at this timing

Counter value

mm+1

INT2 (1)

(Z-phase)

NOTES:

1. When the rising edge of INT2 is selected.

14.1.2.1 Counter Reset by Two-Phase Pulse Signal Processing

The timer counter is reset to "0" by a Z-phase input when processing a two-phase pulse signal.

This function can be used in timer A3 event counter mode, two-phase pulse signal processing, free-

_______

run type or multiply-by-4 processing. The Z-phase signal is applied to the INT2 pin.

When the TAZIE bit in the ONSF register is set to "1" (Z-phase input enabled), the timer counter can

be reset by a Z-phase input. To reset the timer counter by a Z-phase input, set the TA3 register to

"000016" beforehand.

_______

Z-phase input is enabled when the edge of the signal applied to the INT2 pin is detected. The POL bit

in the INT2IC register can determine edge polarity. The Z-phase must have a pulse width of one timer

A3 count source cycle or more. Figure 14.10 shows two-phase pulses (A-phase and B-phase) and

the Z-phase.

Z-phase input resets the counter in the next count source following Z-phase input. Figure 14.11 shows

the counter reset timing.

Timer A3 interrupt request is generated twice when a timer A3 overflow or underflow, and a counter

_______

reset by INT2 input occur at the same time. Do not use the timer A3 interrupt request when this

function is used.

Figure 14.10 Two-phase Pulse (A-phase and B-phase) and Z-phase

Figure 14.11 Counter Reset Timing

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