HD6432351 datasheet(221/1025 Pages) RENESAS

221 / 1025 page

Section 6 Bus Controller

Rev. 3.00 Sep 15, 2006 page 187 of 988

REJ09B0330-0300

6.9

Write Data Buffer Function

The H8S/2350 Group has a write data buffer function in the external data bus. Using the write data

buffer function enables external writes and DMA single address mode transfers to be executed in

parallel with internal accesses. The write data buffer function is made available by setting the

WDBE bit in BCRL to 1.

Figure 6.36 shows an example of the timing when the write data buffer function is used. When this

function is used, if an external write or DMA single address mode transfer continues for 2 states or

longer, and there is an internal access next, only an external write is executed in the first state, but

from the next state onward an internal access (on-chip memory or internal I/O register read/write)

is executed in parallel with the external write rather than waiting until it ends.

Internal address bus

A23 to A0

External write cycle

HWR, LWR

On-chip memory read

Internal I/O register read

Internal read signal

CSn

D15 to D0

External address

Internal memory

External

space

write

Internal I/O register address

Figure 6.36 Example of Timing when Write Data Buffer Function Is Used

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