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HD6432142 Datasheet(PDF) 448 Page - Renesas Technology Corp

Part # HD6432142
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1177 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432142 Datasheet(HTML) 448 Page - Renesas Technology Corp

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Section 13 Timer Connection
Rev. 4.00 Sep 27, 2006 page 404 of 1130
REJ09B0327-0400
13.3.8
VSYNCO Output
With the VSYNCO output, the meaning of the signal source to be selected and use or non-use of
modification varies according to the IVI signal source and the waveform required by external
circuitry. The meaning of the VSYNCO output in each mode is shown in table 13.10.
Table 13.10 Meaning of VSYNCO Output in Each Mode
Mode
IVI Signal
IVO Signal
Meaning of IVO Signal
No signal
VFBACKI
input
IVI signal (without fall
modification or IHI
synchronization)
VFBACKI input is output directly
IVI signal (without fall
modification, with IHI
synchronization)
Meaningless unless VFBACKI input is
synchronized with HFBACKI input
IVI signal (with fall
modification, without IHI
synchronization)
VFBACKI input fall is modified before output
IVI signal (with fall
modification and IHI
synchronization)
VFBACKI input fall is modified and signal is
synchronized with HFBACKI input before
output
IVG signal
Internal synchronization signal is output
S-on-G
mode or
composite
mode
PDC signal
IVI signal (without fall
modification or IHI
synchronization)
CSYNCI/HSYNCI input (composite
synchronization signal) vertical
synchronization signal part is separated
before output
IVI signal (without fall
modification, with IHI
synchronization)
CSYNCI/HSYNCI input (composite
synchronization signal) vertical
synchronization signal part is separated, and
signal is synchronized with CSYNCI/HSYNCI
input before output
IVI signal (with fall
modification, without IHI
synchronization)
CSYNCI/HSYNCI input (composite
synchronization signal) vertical
synchronization signal part is separated, and
fall is modified before output
IVI signal (with fall
modification and IHI
synchronization)
CSYNCI/HSYNCI input (composite
synchronization signal) vertical
synchronization signal part is separated, fall is
modified, and signal is synchronized with
CSYNCI/HSYNCI input before output
IVG signal
Internal synchronization signal is output



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