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HD6432142 Datasheet(PDF) 679 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 679 Page - Renesas Technology Corp |
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679 / 1177 page ![]() Section 21 RAM Rev. 4.00 Sep 27, 2006 page 635 of 1130 REJ09B0327-0400 Section 21 RAM 21.1 Overview The H8S/2148, H8S/2144, and H8S/2143 have 4 kbytes of on-chip high-speed static RAM, and the H8S/2147, H8S/2147N, and H8S/2142 have 2 kbytes. The on-chip RAM is connected to the CPU by a 16-bit data bus, enabling both byte data and word data to be accessed in one state. This makes it possible to perform fast word data transfer. The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the system control register (SYSCR). 21.1.1 Block Diagram Figure 21.1 shows a block diagram of the on-chip RAM. Internal data bus (upper 8 bits) Internal data bus (lower 8 bits) H'FFE080 H'FFE082 H'FFE084 H'FFEFFE H'FFE081 H'FFE083 H'FFE085 H'FFEFFF H'FFFF00 H'FFFF7E H'FFFF01 H'FFFF7F Figure 21.1 Block Diagram of RAM (H8S/2148, H8S/2144, H8S/2143) |
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