HD6432142 datasheet(730/1177 Pages) RENESAS

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Section 23 ROM (H8S/2148 F-ZTAT A-Mask Version, H8S/2147 F-ZTAT A-Mask Version, H8S/2144 F-ZTAT A-Mask Version)

Rev. 4.00 Sep 27, 2006 page 686 of 1130

REJ09B0327-0400

23.1.2

This group on-chip ROM is controlled by the operating mode and register MDCR. The register

configuration is shown in table 23.1.

Table 23.1

ROM Register

Abbreviation

R/W

Initial Value

Address*

Mode control register

MDCR

R/W

Undefined

Depends on the operating mode

H'FFC5

Note:

Lower 16 bits of the address.

23.2

23.2.1

Mode Control Register (MDCR)

Bit

Initial value

Read/Write

EXPE

—*

R/W*

—

MDS0

—*

—

MDS1

—*

Note: * Determined by the MD1 and MD0 pins.

MDCR is an 8-bit read-only register used to set this group operating mode and monitor the current

operating mode.

The EXPE bit is initialized in accordance with the mode pin states by a reset and in hardware

standby mode.

Bit 7—Expanded Mode Enable (EXPE): Sets expanded mode. In mode 1, EXPE is fixed at 1

and cannot be modified. In modes 2 and 3, EXPE has an initial value of 0 and can be read or

written.

Bit 7

EXPE

Description

Single-chip mode selected

Expanded mode selected

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