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HD6432142 Datasheet(PDF) 894 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 894 Page - Renesas Technology Corp |
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894 / 1177 page ![]() Section 26 Electrical Characteristics Rev. 4.00 Sep 27, 2006 page 850 of 1130 REJ09B0327-0400 (3) Bus Timing Table 26.36 shows the bus timing. Operation in external expansion mode is not guaranteed when operating on the subclock ( φ = 32.768 kHz). Table 26.36 Bus Timing (1) (Nomal mode) Condition A: V CC = 5.0 V ±10%, VCCB = 5.0 V ±10%, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C Condition B: V CC = 3.0 V to 5.5 V, VCCB = 3.0 V to 5.5 V, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C Condition A Condition B 20 MHz 10 MHz Item Symbol Min Max Min Max Unit Test Conditions Address delay time t AD — 20 — 40 ns Address setup time t AS 0.5 × t cyc –15 —0.5 × t cyc –30 —ns Figure 26.10 to figure 26.14 Address hold time t AH 0.5 × t cyc –10 —0.5 × t cyc –20 —ns CS delay time ( IOS) t CSD — 20 — 40 ns AS delay time t ASD — 30 — 60 ns RD delay time 1 t RSD1 — 30 — 60 ns RD delay time 2 t RSD2 — 30 — 60 ns Read data setup time t RDS 15 — 35 — ns Read data hold time t RDH 0— 0 — ns |
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