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SH7708 Datasheet(PDF) 493 Page - Renesas Technology Corp |
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SH7708 Datasheet(HTML) 493 Page - Renesas Technology Corp |
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493 / 633 page  475 Tr Trw Tc1 Tc2 Tc3 Tc4 (Trwl) (Tpc) CKIO A25–A16 A12 or A10 A15–A0 RD/ WR RAS CAS DQMxx D31–D0 BS CKE CSn (High) tAD tAD tAD tAD Row address Row address Row address tAD tAD tAD tAD tRWD tRWD tRWD Write command tAD tCSD1 tCSD1 tCASD2 tCASD2 tDQMD tDQMD tBSD tBSD tWDD2 tWDD2 tRASD2 tRASD2 Column address (1–4) Write A command tWDH2 Figure 16.41 Synchronous DRAM Write Bus Cycle (Burst Mode (Single Write × 4), RCD = 1, TPC = 0, TRWL = 0) |
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