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MXHV9910 Datasheet(PDF) 4 Page - Clare, Inc. |
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MXHV9910 Datasheet(HTML) 4 Page - Clare, Inc. |
4 / 11 page ![]() MXHV9910 4 www.clare.com R01 1.4 Recommended Operating Conditions 1.5 Electrical Characteristics Unless otherwise specified, all electrical specifications are provided for TA=25°C. 1.6 Thermal Characteristics 1 Use of a four-layer PCB can improve thermal dissipation (reference EIA/JEDEC JESD51-5). Parameter Symbol Minimum Nominal Maximum Unit Input Voltage Range VIN 8 - 450 VDC PWMD Frequency fPWMD - 500 - Hz Operating Temperature TA -40 - +85 °C Parameter Conditions Symbol Minimum Typical Maximum Unit Input Input DC Voltage Range DC Input Voltage VIN 8 - 450 VDC Shut-Down Mode Supply Current PWMD to GND, VIN=15 to 450V IINSD -0.3 0.6 mA Maximum Voltage to VDD Pin External Voltage applied to VDD Pin VDDmax -- 12 V Regulator Internal Voltage Regulator VIN=15V to 450V, IDD(ext)=0, GATE Output=Open VDD 7.2 7.8 8.4 VDC VDD Current Available for External Circuitry - IDD(ext) -- 2 mA VDD Load Regulation VIN=15V, IL=1mA ΔV DD - - 200 mV PWM Dimming PWMD Input Low Voltage VIN=8V to 450V VEN(low) -- 0.5 V PWMD Input High Voltage VIN=8V to 450V VEN(high) 2.4 - - PWMD Pull-Down Resistance VIN=12V, VPWMD=VDD REN 70 115 150 k Ω Current Sense Comparator Current Sense (CS) Input Current CS Low CS=0V IIL --45 -90 μA CS High CS=VDD IIH -0 ±15 Current Sense Threshold Voltage -40°C < TA < 85°CVCS(high) 200 - 280 mV Current Sense Blanking Interval RT=400kΩ tBLANK - 400 - ns Delay from CS Trip to Gate Low RT=400kΩ tDELAY - 300 - ns Oscillator Oscillator Frequency (Gate Driver) RT=400kΩ fS 51 64 77 kHz Gate Driver Gate High Output Voltage IOUT= -10mA VGATE(hi) VDD-0.3 -- V Gate Low Output Voltage IOUT=10mA VGATE(lo) - 0.03 0.3 Gate Output Rise Time CGATE=500pF tRISE -16- ns Gate Output Fall Time CGATE=500pF tFALL -7- Parameter Package Symbol Minimum Typical Maximum Unit Thermal Resistance, Junction-to-Ambient SOIC-8 With Thermal Pad (BE) 1 RθJA -50- °C/W SOIC-8 W/O Thermal Pad (B) - 128 - |
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