AT90SCR100 datasheet(275/433 Pages) ATMEL

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275

TPR0327AY–SMS–30Jan09

AT90SCR100

20.5

Data Modes

There are four combinations of SCK phase and polarity with respect to serial data, which are

determined by control bits CPHA and CPOL. The SPI data transfer formats are shown in Figure

20-3 and Figure 20-4. Data bits are shifted out and latched in on opposite edges of the SCK sig-

nal, ensuring sufficient time for data signals to stabilize. This is clearly seen by summarizing

Table 20-2 and Table 20-3, as done below:

Figure 20-3.

SPI Transfer Format with CPHA = 0

Figure 20-4.

SPI Transfer Format with CPHA = 1

Table 20-5.

CPOL Functionality

Leading Edge

Trailing eDge

SPI Mode

CPOL=0, CPHA=0

Sample (Rising)

Setup (Falling)

CPOL=0, CPHA=1

Setup (Rising)

Sample (Falling)

CPOL=1, CPHA=0

Sample (Falling)

Setup (Rising)

CPOL=1, CPHA=1

Setup (Falling)

Sample (Rising)

Bit 1

Bit 6

LSB

MSB

SCK (CPOL = 0)

mode 0

SAMPLE I

MOSI/MISO

CHANGE 0

MOSI PIN

CHANGE 0

MISO PIN

SCK (CPOL = 1)

mode 2

MSB

LSB

Bit 6

Bit 1

Bit 5

Bit 2

Bit 4

Bit 3

Bit 4

Bit 2

Bit 5

MSB first (DORD = 0)

LSB first (DORD = 1)

SCK (CPOL = 0)

mode 1

SAMPLE I

MOSI/MISO

CHANGE 0

MOSI PIN

CHANGE 0

MISO PIN

SCK (CPOL = 1)

mode 3

MSB

LSB

Bit 6

Bit 1

Bit 5

Bit 2

Bit 4

Bit 3

Bit 4

Bit 2

Bit 5

Bit 1

Bit 6

LSB

MSB

MSB first (DORD = 0)

LSB first (DORD = 1)

AT90SCR100 Datasheet(PDF) 275 Page - ATMEL Corporation

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