AT89LP6440 datasheet(150/194 Pages) ATMEL

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3706A–MICRO–9/09

AT89LP6440 - Preliminary

22.1.7

LSL M

Function: Shift MAC Accumulator Left Logically

Description: The forty bits in the M register are shifted one bit to the left. Bit 0 is cleared. No flags are affected.

Example: The M register holds the value 0C5B1A29384H. The following instruction,

LSL M

leaves the M register holding the value 8B63452708H.

Bytes: 2

Cycles: 2

Encoding:

010

001

Operation: LSL

(Mn+1) ←(Mn) n = 0 - 38

(M0) ← 0

22.1.8

MOVC A, @A+/DPTR

Function: Move code byte relative to Alternate Data Pointer

Description: The MOVC instructions load the Accumulator with a code byte or constant from program memory. The address

of the byte fetched is the sum of the original unsigned 8-bit Accumulator contents and the contents of the

unselected Data Pointer. The base register is not altered. Sixteen-bit addition is performed so a carry-out from

the low-order eight bits may propagate through higher-order bits. No flags are affected.

Example: A value between 0 and 3 is in the Accumulator. The following instructions will translate the value in the

Accumulator to one of four values defined by the DB (define byte) directive.

MOV

/DPTR, #TABLE

MOVC

A, @A+PC

RET

TABLE:

66H

77H

88H

99H

If the subroutine is called with the Accumulator equal to 01H, it returns with 77H in the Accumulator.

Bytes: 2

Cycles: 4

Encoding:

001

Operation: MOVC

IF (DPS) = 0

THEN

(A)

←( (A) + (DPTR1) )

ELSE

(A)

←( (A) + (DPTR0) )

AT89LP6440 Datasheet(PDF) 150 Page - ATMEL Corporation

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