ATmega16M1 datasheet(115/365 Pages) ATMEL

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7647F–AVR–04/09

ATmega16/32/64/M1/C1

The ICRn Register can only be written when using a Waveform Generation mode that utilizes

the ICRn Register for defining the counter’s TOP value. In these cases the Waveform Genera-

tion mode (WGMn3:0) bits must be set before the TOP value can be written to the ICRn

before the low byte is written to ICRnL.

For more information on how to access the 16-bit registers refer to “Accessing 16-bit Registers”

on page 109.

The ICF1 output can be used to retrigger the timer counter. It has the same effect than the TOP

signal.

13.5.1

Input Capture Trigger Source

The trigger sources for the Input Capture unit arethe Input Capture pin (ICP1A & ICP1B).

Be aware that changing trigger source can trigger a capture. The Input Capture Flag must there-

fore be cleared after the change.

The Input Capture pin (ICPn) IS sampled using the same technique as for the Tn pin (Figure

11-1 on page 87). The edge detector is also identical. However, when the noise canceler is

enabled, additional logic is inserted before the edge detector, which increases the delay by four

system clock cycles. Note that the input of the noise canceler and edge detector is always

enabled unless the Timer/Counter is set in a Waveform Generation mode that uses ICRn to

define TOP.

An Input Capture can be triggered by software by controlling the port of the ICPn pin.

13.5.2

Noise Canceler

The noise canceler improves noise immunity by using a simple digital filtering scheme. The

noise canceler input is monitored over four samples, and all four must be equal for changing the

output that in turn is used by the edge detector.

The noise canceler is enabled by setting the Input Capture Noise Canceler (ICNCn) bit in

Timer/Counter Control Register B (TCCRnB). When enabled the noise canceler introduces addi-

tional four system clock cycles of delay from a change applied to the input, to the update of the

ICRn Register. The noise canceler uses the system clock and is therefore not affected by the

prescaler.

13.5.3

Using the Input Capture Unit

The main challenge when using the Input Capture unit is to assign enough processor capacity

for handling the incoming events. The time between two events is critical. If the processor has

not read the captured value in the ICRn Register before the next event occurs, the ICRn will be

overwritten with a new value. In this case the result of the capture will be incorrect.

When using the Input Capture interrupt, the ICRn Register should be read as early in the inter-

rupt handler routine as possible. Even though the Input Capture interrupt has relatively high

priority, the maximum interrupt response time is dependent on the maximum number of clock

cycles it takes to handle any of the other interrupt requests.

Using the Input Capture unit in any mode of operation when the TOP value (resolution) is

actively changed during operation, is not recommended.

ATmega16M1 Datasheet(PDF) 115 Page - ATMEL Corporation

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