ATmega16M1 datasheet(132/365 Pages) ATMEL

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132

7647F–AVR–04/09

ATmega16/32/64/M1/C1

13.10.2

Timer/Counter1 Control Register B – TCCR1B

• Bit 7 – ICNCn: Input Capture Noise Canceler

Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is

activated, the input from the Input Capture pin (ICPn) is filtered. The filter function requires four

successive equal valued samples of the ICPn pin for changing its output. The Input Capture is

therefore delayed by four Oscillator cycles when the noise canceler is enabled.

• Bit 6 – ICESn: Input Capture Edge Select

This bit selects which edge on the Input Capture pin (ICPn) that is used to trigger a capture

event. When the ICESn bit is written to zero, a falling (negative) edge is used as trigger, and

when the ICESn bit is written to one, a rising (positive) edge will trigger the capture.

When a capture is triggered according to the ICESn setting, the counter value is copied into the

Input Capture Register (ICRn). The event will also set the Input Capture Flag (ICFn), and this

can be used to cause an Input Capture Interrupt, if this interrupt is enabled.

When the ICRn is used as TOP value (see description of the WGMn3:0 bits located in the

TCCRnA and the TCCRnB Register), the ICPn is disconnected and consequently the Input Cap-

ture function is disabled.

•Bit 5 – RTGEN

Set this bit to enable the ICP1A as a timer/counter retrigger input.

(This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be

written to zero when TCCRnB is written.)

• Bit 4:3 – WGMn3:2: Waveform Generation Mode

See TCCRnA Register description.

• Bit 2:0 – CSn2:0: Clock Select

The three Clock Select bits select the clock source to be used by the Timer/Counter, see Figure

13-10 and Figure 13-11.

Bit

210

ICNC1

ICES1

RTGEN

WGM13

WGM12

CS12

CS11

CS10

TCCR1B

Read/Write

R/W

Initial Value

Table 13-5.

Clock Select Bit Description

CSn2

CSn1

CSn0

Description

No clock source (Timer/Counter stopped).

001

clk

I/O/1 (No prescaling)

010

clkI/O/8 (From prescaler)

011

clkI/O/64 (From prescaler)

100

clk

I/O/256 (From prescaler)

101

clkI/O/1024 (From prescaler)

External clock source on Tn pin. Clock on falling edge.

External clock source on Tn pin. Clock on rising edge.

ATmega16M1 Datasheet(PDF) 132 Page - ATMEL Corporation

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