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ATmega328P Datasheet(PDF) 247 Page - ATMEL Corporation |
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ATmega328P Datasheet(HTML) 247 Page - ATMEL Corporation |
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247 / 345 page  247 7810A–AVR–11/09 ATmega328P [Preliminary] Figure 23-6. ADC Timing Diagram, Auto Triggered Conversion Figure 23-7. ADC Timing Diagram, Free Running Conversion Table 23-1. ADC Conversion Time Condition Sample & Hold (Cycles from Start of Conversion) Conversion Time (Cycles) First conversion 13.5 25 Normal conversions, single ended 1.5 13 Auto Triggered conversions 2 13.5 1 2 3 4 5 6 7 8 9 10 11 12 13 Sign and MSB of Result LSB of Result ADC Clock Trigger Source ADIF ADCH ADCL Cycle Number 12 One Conversion Next Conversion Conversion Complete Prescaler Reset ADATE Prescaler Reset Sample & Hold MUX and REFS Update 11 12 13 Sign and MSB of Result LSB of Result ADC Clock ADSC ADIF ADCH ADCL Cycle Number 12 One Conversion Next Conversion 34 Conversion Complete Sample & Hold MUX and REFS Update |
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