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ATmega328P Datasheet(PDF) 312 Page - ATMEL Corporation |
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ATmega328P Datasheet(HTML) 312 Page - ATMEL Corporation |
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312 / 345 page  312 7810A–AVR–11/09 ATmega328P [Preliminary] Figure 28-5. 2-wire Serial Bus Timing 28.9 ADC Characteristics 28.10 Parallel Programming Characteristics tSU;STA tLOW tHIGH tLOW tof tHD;STA tHD;DAT tSU;DAT tSU;STO tBUF SCL SDA tr Table 28-8. ADC Characteristics Symbol Parameter Condition Min Typ Max Units Resolution -40°c +125°c / 2.70 - 5.50V ADC clock = 200kHz 10 bits TUE Absolute accuracy Vcc = 4.0v, VRef = 4.0v 2.2 3.5 LSB INL Integral Non Linearity Vcc = 4.0v, VRef = 4.0v 0.6 1.5 LSB DNL Differential Non Linearity Vcc = 4.0v, VRef = 4.0v 0.3 0.7 LSB Gain error Vcc = 4.0v, VRef = 4.0v -3.5 3.5 LSB Offset error Vcc = 4.0v, VRef = 4.0v -3.5 3.5 LSB Clock frequency 50 200 kHz AVcc Analog Supply Voltage Vcc –0.3 Vcc +0.3 V VRef Reference Voltage 1.0 AVcc V Vin Input Voltage GND VRef V Vint Internal Voltage Reference Vcc = 5v 1.0 1.1 1.2 V Rref Reference Input resistance 22.4 32 41.6 kΩ Rain Analog input resistance 100 MΩ Table 28-9. Parallel Programming Characteristics, V CC = 5V ± 10% Symbol Parameter Min Typ Max Units VPP Programming Enable Voltage 11.5 12.5 V IPP Programming Enable Current 250 µA tDVXH Data and Control Valid before XTAL1 High 67 ns tXLXH XTAL1 Low to XTAL1 High 200 ns tXHXL XTAL1 Pulse Width High 150 ns tXLDX Data and Control Hold after XTAL1 Low 67 ns tXLWL XTAL1 Low to WR Low 0 ns tXLPH XTAL1 Low to PAGEL high 0 ns tPLXH PAGEL low to XTAL1 high 150 ns tBVPH BS1 Valid before PAGEL High 67 ns |
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