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ATmega16A Datasheet(PDF) 180 Page - ATMEL Corporation |
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ATmega16A Datasheet(HTML) 180 Page - ATMEL Corporation |
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180 / 352 page  180 8154B–AVR–07/09 ATmega16A mode, checking if it is being addressed by the winning Master. The SDA line should be left high, but losing Masters are allowed to generate a clock signal until the end of the current data or address packet. Arbitration will continue until only one Master remains, and this may take many bits. If several Masters are trying to address the same Slave, arbitration will continue into the data packet. Figure 20-8. Arbitration between Two Masters Note that arbitration is not allowed between: • A REPEATED START condition and a data bit • A STOP condition and a data bit • A REPEATED START and a STOP condition It is the user software’s responsibility to ensure that these illegal arbitration conditions never occur. This implies that in multi-master systems, all data transfers must use the same composi- tion of SLA+R/W and data packets. In other words: All transmissions must contain the same number of data packets, otherwise the result of the arbitration is undefined. SDA from Master A SDA from Master B SDA Line Synchronized SCL Line START Master A Loses Arbitration, SDA A SDA |
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