ATmega16A datasheet(283/352 Pages) ATMEL

283 / 352 page

283

8154B–AVR–07/09

ATmega16A

• Shift-DR: Flash data are automatically read one byte at a time and shifted out on TDO by the

TCK input. The TDI input is ignored.

Note:

The JTAG instruction PROG_PAGEREAD can only be used if the AVR device is the first device in

JTAG scan chain. If the AVR cannot be the first device in the scan chain, the byte-wise program-

ming algorithm must be used.

26.10.7

Data Registers

The Data Registers are selected by the JTAG Instruction Registers described in section “Pro-

gramming Specific JTAG Instructions” on page 280. The Data Registers relevant for

programming operations are:

• Reset Register

• Programming Enable Register

• Programming Command Register

• Virtual Flash Page Load Register

• Virtual Flash Page Read Register

26.10.8

Reset Register

The Reset Register is a Test Data Register used to reset the part during programming. It is

required to reset the part before entering programming mode.

A high value in the Reset Register corresponds to pulling the external Reset low. The part is

reset as long as there is a high value present in the Reset Register. Depending on the Fuse set-

tings for the clock options, the part will remain reset for a Reset Time-out Period (refer to “Clock

Sources” on page 25) after releasing the Reset Register. The output from this Data Register is

not latched, so the reset will take place immediately, as shown in Figure 24-2 on page 234.

26.10.9

Programming Enable Register

The Programming Enable Register is a 16-bit register. The contents of this register is compared

to the programming enable signature, binary code 1010_0011_0111_0000. When the contents

of the register is equal to the programming enable signature, programming via the JTAG port is

enabled. The register is reset to 0 on Power-on Reset, and should always be reset when leaving

Programming mode.

ATmega16A Datasheet(PDF) 283 Page - ATMEL Corporation