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ATmega32A Datasheet(PDF) 187 Page - ATMEL Corporation |
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ATmega32A Datasheet(HTML) 187 Page - ATMEL Corporation |
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187 / 352 page ![]() 187 8155B–AVR–07/09 ATmega32A The following sections describe each of these modes. Possible status codes are described along with figures detailing data transmission in each of the modes. These figures contain the following abbreviations: S: START condition Rs: REPEATED START condition R: Read bit (high level at SDA) W: Write bit (low level at SDA) A: Acknowledge bit (low level at SDA) A: Not acknowledge bit (high level at SDA) Data: 8-bit data byte P: STOP condition SLA: Slave Address In Figure 20-12 to Figure 20-18, circles are used to indicate that the TWINT Flag is set. The numbers in the circles show the status code held in TWSR, with the prescaler bits masked to zero. At these points, actions must be taken by the application to continue or complete the TWI transfer. The TWI transfer is suspended until the TWINT Flag is cleared by software. When the TWINT Flag is set, the status code in TWSR is used to determine the appropriate soft- ware action. For each status code, the required software action and details of the following serial transfer are given in Table 20-2 to Table 20-5. Note that the prescaler bits are masked to zero in these tables. 20.7.1 Master Transmitter Mode In the Master Transmitter mode, a number of data bytes are transmitted to a slave receiver (see Figure 20-11). In order to enter a Master mode, a START condition must be transmitted. The for- mat of the following address packet determines whether Master Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section assume that the prescaler bits are zero or are masked to zero. Figure 20-11. Data Transfer in Master Transmitter Mode A START condition is sent by writing the following value to TWCR: TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE Value 1 X1 0 X1 0 X Device 1 MASTER TRANSMITTER Device 2 SLAVE RECEIVER Device 3 Device n SDA SCL ........ R1 R2 V CC |
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