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ATmega32A Datasheet(PDF) 349 Page - ATMEL Corporation |
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ATmega32A Datasheet(HTML) 349 Page - ATMEL Corporation |
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349 / 352 page ![]() v 8155B–AVR–07/09 ATmega32A 22.5 Prescaling and Conversion Timing ................................................................211 22.6 Changing Channel or Reference Selection ...................................................214 22.7 ADC Noise Canceler .....................................................................................216 22.8 ADC Conversion Result .................................................................................220 22.9 Register Description ......................................................................................222 23 JTAG Interface and On-chip Debug System ...................................... 227 23.1 Features ........................................................................................................227 23.2 Overview ........................................................................................................227 23.3 TAP – Test Access Port ................................................................................227 23.4 TAP Controller ...............................................................................................229 23.5 Using the Boundary-scan Chain ....................................................................230 23.6 Using the On-chip Debug System .................................................................230 23.7 On-chip Debug Specific JTAG Instructions ...................................................231 23.8 Using the JTAG Programming Capabilities ...................................................232 23.9 Register Description ......................................................................................232 23.10 Bibliography ...................................................................................................232 24 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 233 24.1 Features ........................................................................................................233 24.2 Overview ........................................................................................................233 24.3 Data Registers ...............................................................................................233 24.4 Boundary-scan Specific JTAG Instructions ...................................................235 24.5 Boundary-scan Chain ....................................................................................236 24.6 ATmega32A Boundary-scan Order ...............................................................246 24.7 Boundary-scan Description Language Files ..................................................251 24.8 Register Description ......................................................................................251 25 Boot Loader Support – Read-While-Write Self-Programming ......... 252 25.1 Features ........................................................................................................252 25.2 Overview ........................................................................................................252 25.3 Application and Boot Loader Flash Sections .................................................252 25.4 Read-While-Write and no Read-While-Write Flash Sections ........................253 25.5 Boot Loader Lock Bits ...................................................................................255 25.6 Entering the Boot Loader Program ................................................................256 25.7 Addressing the Flash during Self-Programming ............................................257 25.8 Self-Programming the Flash ..........................................................................258 25.9 Register Description ......................................................................................264 |
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