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AT90PWM2 Datasheet(PDF) 163 Page - ATMEL Corporation |
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AT90PWM2 Datasheet(HTML) 163 Page - ATMEL Corporation |
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163 / 361 page  163 4317J–AVR–08/10 AT90PWM2/3/2B/3B 16.25.7 Output Compare RB Register – OCRnRBH and OCRnRBL Note : n = 0 to 2 according to PSC number. The Output Compare Registers RA, RB, SA and SB contain a 12-bit value that is continuously compared with the PSC counter value. A match can be used to generate an Output Compare interrupt, or to generate a waveform output on the associated pin. The Output Compare Registers RB contains also a 4-bit value that is used for the flank width modulation. The Output Compare Registers are 16bit and 12-bit in size. To ensure that both the high and low bytes are written simultaneously when the CPU writes to these registers, the access is per- formed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by all the other 16-bit registers. 16.25.8 PSC 0 Configuration Register – PCNF0 16.25.9 PSC 1 Configuration Register – PCNF1 16.25.10 PSC 2 Configuration Register – PCNF2 The PSC n Configuration Register is used to configure the running mode of the PSC. • Bit 7 - PFIFTYn: PSC n Fifty Writing this bit to one, set the PSC in a fifty percent mode where only OCRnRBH/L and OCRn- SBH/L are used. They are duplicated in OCRnRAH/L and OCRnSAH/L during the update of OCRnRBH/L. This feature is useful to perform fifty percent waveforms. • Bit 6 - PALOCKn: PSC n Autolock When this bit is set, the Output Compare Registers RA, SA, SB, the Output Matrix POM2 and the PSC Output Configuration PSOCn can be written without disturbing the PSC cycles. The Read/Write WWWWWWWW Initial Value 00000000 Bit 76543210 OCRnRB[15:12] OCRnRB[11:8] OCRnRBH OCRnRB[7:0] OCRnRBL Read/Write WWWWWWWW Initial Value 00000000 Bit 7 654 3 2 1 0 PFIFTY0 PALOCK0 PLOCK0 PMODE01 PMODE00 POP0 PCLKSEL0 - PCNF0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 654 3 2 1 0 PFIFTY1 PALOCK1 PLOCK1 PMODE11 PMODE10 POP1 PCLKSEL1 - PCNF1 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 654 3 2 1 0 PFIFTY2 PALOCK2 PLOCK2 PMODE21 PMODE20 POP2 PCLKSEL2 POME2 PCNF2 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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