AT90PWM2 datasheet(278/361 Pages) ATMEL

278 / 361 page

278

4317J–AVR–08/10

AT90PWM2/3/2B/3B

For details about these two section, see “NRWW – No Read-While-Write Section” on page 266

and “RWW – Read-While-Write Section” on page 266

Note:

1. Z15:Z13: always ignored

Z0: should be zero for all SPM commands, byte select for the LPM instruction.

See “Addressing the Flash During Self-Programming” on page 271 for details about the use of

Z-pointer during Self-Programming.

25. Memory Programming

25.1

Program And Data Memory Lock Bits

The AT90PWM2/2B/3/3B provides six Lock bits which can be left unprogrammed (“1”) or can be

programmed (“0”) to obtain the additional features listed in Table 25-2. The Lock bits can only be

erased to “1” with the Chip Erase command.

Table 24-8.

Explanation of Different Variables used in Figure 24-3 and the Mapping to the Z-

pointer

Variable

Corresponding

Z-value(1)

Description

PCMSB

Most significant bit in the Program Counter. (The

Program Counter is 12 bits PC[11:0])

PAGEMSB

Most significant bit which is used to address the

words within one page (32 words in a page requires

5 bits PC [4:0]).

ZPCMSB

Z12

Bit in Z-register that is mapped to PCMSB. Because

Z0 is not used, the ZPCMSB equals PCMSB + 1.

ZPAGEMSB

Bit in Z-register that is mapped to PAGEMSB.

Because Z0 is not used, the ZPAGEMSB equals

PAGEMSB + 1.

PCPAGE

PC[11:5]

Z12:Z6

Program counter page address: Page select, for

page erase and page write

PCWORD

PC[4:0]

Z5:Z1

Program counter word address: Word select, for

filling temporary buffer (must be zero during page

write operation)

Table 25-1.

Lock Bit Byte(1)

Lock Bit Byte

Bit No

Description

Default Value

–

1 (unprogrammed)

–

1 (unprogrammed)

BLB12

Boot Lock bit

1 (unprogrammed)

BLB11

Boot Lock bit

1 (unprogrammed)

BLB02

Boot Lock bit

1 (unprogrammed)

BLB01

Boot Lock bit

1 (unprogrammed)

LB2

Lock bit

1 (unprogrammed)

LB1

Lock bit

1 (unprogrammed)

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