TPS92510

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SLUSAE4A – JANUARY 2012 – REVISED JUNE 2012

THERMAL INFORMATION

TPS92510

MSOP

UNITS

10 PINS

66.7

45.8

37.5

°C/W

1.8

37.1

15.4

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

PWM dimming input frequency

120

1000

Hz

PWM dimming minimum on-time

10

µs

Input voltage

3.5

60

V

High-side MOSFET on-time

350

ns

Peak-to-peak inductor current

150

mA

Operating junction temperature

–40

125

°C

Copyright © 2012, Texas Instruments Incorporated

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