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STA321 Datasheet(PDF) 101 Page - STMicroelectronics |
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STA321 Datasheet(HTML) 101 Page - STMicroelectronics |
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101 / 157 page ![]() STA321 Register description Doc ID 15351 Rev 3 101/157 SRC1STATE Address: 0x30 Type: RO Reset: 0x8F Description: Values of fS based on the 96 kHz as output frequency SRC2STATE Address: 0x31 Type: RO Reset: 0x8F Description: 765 432 10 SRC1_BYP[1:0] SRC_1_LOCK SRC1_FISFO[4:0] [7:6] SRC1_BYP[1:0] 00: input signal has fS < 78 kHz 10: input signal has fS > 81 kHz [5] SRC_1_LOCK 0: SRC target frequency not reached 1: SRC1 target frequency reached [4:0] SRC1_FISFO[4:0] MSB Fs_input / Fs_output 765 432 10 SRC1_BYP[1:0] SRC_1_LOCK SRC1_FISFO[4:0] [7:6] SRC2_BYP[1:0] 00: Input Signal has fS < 78 kHz 10: Input Signal has fS > 81 kHz [5] SRC_2_LOCK 0: SRC target frequency not reached 1: SRC1 target frequency reached [4:0] SRC2_FISFO[4:0] MSB Fs_input / Fs_output |
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