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41594B Datasheet(PDF) 300 Page - Microchip Technology |
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41594B Datasheet(HTML) 300 Page - Microchip Technology |
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300 / 372 page ![]() PIC12LF1840T48A DS41594B-page 300 Preliminary 2011-2012 Microchip Technology Inc. 28.1.2 ADVANCED MODE Advanced mode allows full configuration of the trans- mitter by writing to the Configuration register. Writing and reading from this register is performed via a two-wire interface formed by CTRL and DATA pins. Advanced mode is enabled by applying a rising signal on the CTRL pin while driving DATA low. Upon detec- tion of this rising edge, the data applied to the DATA pin is accepted as register configuration information. Data bits are clocked on subsequent rising edges of the clock signal. The first bit of serial data selects register read or write operation. The timing for module Configu- ration register ‘write’ is shown in Figure 28-3. When writing, all 13 data bits must be written to the register. Similarly, the Configuration register may be read using the timing of Figure 28-4. When reading, all 13 bits of configuration and all 43 bits of test data must be read. The contents of the Configuration register are described in Table 28-2. During the register ‘write’ or ‘read’ phases, the transmitter remains in Sleep mode. The CTRL pin is sampled after t START has elapsed. The CTRL pin should not be allowed to float. FIGURE 28-3: CONFIGURATION REGISTER ‘WRITE’ FIGURE 28-4: CONFIGURATION REGISTER ‘READ’ CTRL DATA R/W D11 D8 D5 D2 ACC D12 D10 D9 D7 D6 D4 D3 D1 D0 0 0 0 CTRL DATA R/W 0 0 D10 D0 ACC 00 0 D12 D11 D1 T42 T41 0 1 0 T1 T0 Legend: Data pin is an output. Note 1: When reading the Configuration register, 64 clock cycles on CTRL pin must be issued, shifting out on DATA pin the 13 Configuration bits, plus 43 internal test bits. Reading only the 13 Configuration bits is not allowed. |
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