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INTEDG Datasheet(PDF) 383 Page - Microchip Technology |
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INTEDG Datasheet(HTML) 383 Page - Microchip Technology |
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383 / 478 page ![]() 2010-2012 Microchip Technology Inc. DS41414D-page 383 PIC16(L)F1946/47 LSLF Logical Left Shift Syntax: [ label ] LSLF f {,d} Operands: 0 f 127 d [0,1] Operation: (f<7>) C (f<6:0>) dest<7:1> 0 dest<0> Status Affected: C, Z Description: The contents of register ‘f’ are shifted one bit to the left through the Carry flag. A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’, the result is placed in W. If ‘d’ is ‘1’, the result is stored back in register ‘f’. LSRF Logical Right Shift Syntax: [ label ] LSRF f {,d} Operands: 0 f 127 d [0,1] Operation: 0 dest<7> (f<7:1>) dest<6:0>, (f<0>) C, Status Affected: C, Z Description: The contents of register ‘f’ are shifted one bit to the right through the Carry flag. A ‘0’ is shifted into the MSb. If ‘d’ is ‘0’, the result is placed in W. If ‘d’ is ‘1’, the result is stored back in register ‘f’. register f 0 C register f C 0 MOVF Move f Syntax: [ label ] MOVF f,d Operands: 0 f 127 d [0,1] Operation: (f) (dest) Status Affected: Z Description: The contents of register f is moved to a destination dependent upon the status of d. If d = 0, destination is W register. If d = 1, the destination is file register f itself. d = 1 is useful to test a file register since status flag Z is affected. Words: 1 Cycles: 1 Example: MOVF FSR, 0 After Instruction W = value in FSR register Z= 1 |
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