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PIC16F87 Datasheet(PDF) 184 Page - Microchip Technology |
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PIC16F87 Datasheet(HTML) 184 Page - Microchip Technology |
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184 / 230 page ![]() PIC16F87/88 DS30487D-page 184 2002-2013 Microchip Technology Inc. TABLE 18-8: SPI MODE REQUIREMENTS FIGURE 18-14: I2C™ BUS START/STOP BITS TIMING Param No. Symbol Characteristic Min Typ† Max Units Conditions 70* TssL2scH, TssL2scL SS to SCK or SCK Input TCY —— ns 71* TscH SCK Input High Time (Slave mode) TCY + 20 — — ns 72* TscL SCK Input Low Time (Slave mode) TCY + 20 — — ns 73* TdiV2scH, TdiV2scL Setup Time of SDI Data Input to SCK Edge 100 — — ns 74* TscH2diL, TscL2diL Hold Time of SDI Data Input to SCK Edge 100 — — ns 75* TdoR SDO Data Output Rise Time PIC16F87/88 PIC16LF87/88 — — 10 25 25 50 ns ns 76* TdoF SDO Data Output Fall Time — 10 25 ns 77* TssH2doZ SS to SDO Output High-Impedance 10 — 50 ns 78* TscR SCK Output Rise Time (Master mode) PIC16F87/88 PIC16LF87/88 — — 10 25 25 50 ns ns 79* TscF SCK Output Fall Time (Master mode) — 10 25 ns 80* TscH2doV, TscL2doV SDO Data Output Valid after SCK Edge PIC16F87/88 PIC16LF87/88 — — — — 50 145 ns ns 81* TdoV2scH, TdoV2scL SDO Data Output Setup to SCK Edge TCY —— ns 82* TssL2doV SDO Data Output Valid after SS Edge — — 50 ns 83* TscH2ssH, TscL2ssH SS after SCK Edge 1.5 TCY + 40 — — ns * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: Refer to Figure 18-3 for load conditions. 91 92 93 SCL SDA Start Condition Stop Condition 90 |
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