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ST72F262G2B5 Datasheet(PDF) 67 Page - STMicroelectronics

Part # ST72F262G2B5
Description  8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72F262G2B5 Datasheet(HTML) 67 Page - STMicroelectronics

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16-BIT TIMER (Cont’d)
3. In PWM mode the ICAP1 pin can not be used
to perform input capture because it is discon-
nected to the timer. The ICAP2 pin can be used
to perform input capture (ICF2 can be set and
IC2R can be loaded) but the user must take
care that the counter is reset each period and
ICF1 can also generates interrupt if ICIE is set.
4. When the Pulse Width Modulation (PWM) and
One Pulse Mode (OPM) bits are both set, the
PWM mode is the only active one.
11.3.4 Low Power Modes
11.3.5 Interrupts
Note: The 16-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts chap-
ter). These events generate an interrupt if the corresponding Enable Control Bit is set and the interrupt
mask in the CC register is reset (RIM instruction).
11.3.6 Summary of Timer modes
1) See note 4 in Section 11.3.3.5 "One Pulse Mode" on page 64
2) See note 5 in Section 11.3.3.5 "One Pulse Mode" on page 64
3) See note 4 in Section 11.3.3.6 "Pulse Width Modulation Mode" on page 66
Mode
Description
WAIT
No effect on 16-bit Timer.
Timer interrupts cause the Device to exit from WAIT mode.
HALT
16-bit Timer registers are frozen.
In HALT mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous
count when the Device is woken up by an interrupt with “exit from HALT mode” capability or from the counter
reset value when the Device is woken up by a RESET.
If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is armed. Consequent-
ly, when the Device is woken up by an interrupt with “exit from HALT mode” capability, the ICFi bit is set, and
the counter value present when exiting from HALT mode is captured into the ICiR register.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Input Capture 1 event/Counter reset in PWM mode
ICF1
ICIE
Yes
No
Input Capture 2 event
ICF2
Yes
No
Output Compare 1 event (not available in PWM mode)
OCF1
OCIE
Yes
No
Output Compare 2 event (not available in PWM mode)
OCF2
Yes
No
Timer Overflow event
TOF
TOIE
Yes
No
MODES
AVAILABLE RESOURCES
Input Capture 1
Input Capture 2
Output Compare 1 Output Compare 2
Input Capture (1 and/or 2)
Yes
Yes
Yes
Yes
Output Compare (1 and/or 2)
Yes
Yes
Yes
Yes
One Pulse Mode
No
Not Recommended1)
No
Partially 2)
PWM Mode
No
Not Recommended3)
No
No


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