32GA002 datasheet(158/268 Pages) MICROCHIP

158 / 268 page

PIC24FJ64GA004 FAMILY

DS39881D-page 158

 2010 Microchip Technology Inc.

16.5

Acknowledge Status

In both Master and Slave modes, the ACKSTAT bit is

only updated when transmitting data resulting in the

reception of an ACK or NACK from another device. Do

not check the state of ACKSTAT when receiving data,

either as a Slave or a Master. Reading ACKSTAT after

receiving address or data bytes returns an invalid

result.

I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER

U-0

R/W-0

—

AMSK9

AMSK8

bit 15

bit 8

R/W-0

AMSK7

AMSK6

AMSK5

AMSK4

AMSK3

AMSK2

AMSK1

AMSK0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-10

Unimplemented:

Read as ‘0’

bit 9-0

AMSK9:AMSK0:

Mask for Address Bit x Select bits

= Enable masking for bit x of incoming message address; bit match not required in this position

= Disable masking for bit x; bit match required in this position

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